EP2S30F672I4 vs EP2S30F672C5NRB Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2S30F672I4 sa pamamagitan ng Intel at EP2S30F672C5NRB sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2S30F672I4 | EP2S30F672C5NRB |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Series | Stratix II | Stratix II |
| Manufacturer | Intel (formerly Altera) | Intel (formerly Altera) |
| Logic Elements | 33880 | — |
| Logic Array Blocks (LABs) | 1694 | — |
| Total RAM Bits | 1369728 | [DATA_NEEDED: total embedded memory bits] |
| Number of I/O | 500 | 500 |
| DSP Blocks | 12 (per datasheet, family range) | — |
| Number of PLLs | 6 | — |
| Voltage - Supply | 1.2 V core, separate I/O bank VCCIO | — |
| Temperature na Operasyon | -40C to +100C (Industrial) | 0 C to 85 C (TJ) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Packhaging / Kaso | 672-BBGA, FCBGA (FBGA-672) | 672-BBGA |
| Package Dimensions | 35 x 35 mm | — |
| Ball Pitch | 1.0 mm | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS, SRAM-based configuration |
| Configuration | JTAG, serial, parallel (Stratix II scheme) | — |
| Level ng MSL | 3 (per JEDEC J-STD-020) | — |
| Tindminan RoHS | [DATA_NEEDED: confirm RoHS compliance on part label] | Compliant (NRB suffix) |
| Logic Elements / Cells | — | 33,880 |
| Number of LABs / CLBs | — | 1,694 |
| Voltage - Supply (Core) | — | 1.15 V to 1.25 V |
| Supplier Device Package | — | 672-FBGA (27 x 27 mm) |
| Packaging | — | Tray (NRB suffix = RoHS, no NRB = legacy) |
| Configuration Method | — | SRAM, configured via JTAG, PS, or FPP |
| Product Status | — | Obsolete (last time buy / end of life) |