EP2S60F1020I5N vs EP2S60F1020C4N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP2S60F1020I5N sa pamamagitan ng Intel at EP2S60F1020C4N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Intel
EP2S60F1020I5N EP2S60F1020I5N - 60K LE Stratix II FPGA, 718 I/O, 1020-BGA

EP2S60F1020I5N - 60K LE Stratix II FPGA, 718 I/O, 1020-BGA

EP2S60F1020I5N ⚠ Huling Pagbili

Pagsanggunian na paghahambing

Parametro EP2S60F1020I5N EP2S60F1020C4N
Brand Intel Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Huling Pagbili Obsolete
Family Stratix II Stratix II (EP2S60)
Logic Elements 60440 60,440
User I/O Count 718 —
Operating Frequency (max) 609.76 MHz —
Process Technology 90 nm CMOS 90 nm CMOS
Core Voltage (VCCINT) 1.2 V —
Packhaging 1020-ball FC-FBGA 1020-ball FC-FBGA (Fine-pitch Chip-Scale BGA)
Uri ng Pagpapasok Surface Mount Surface Mount (BGA)
Temperature na Operasyon -40C to +100C (industrial) —
Speed Grade I5 —
Tindminan RoHS [DATA_NEEDED: RoHS compliance status] EU RoHS compliant with exemption (per Arrow listing)
Lead-Free [DATA_NEEDED: lead-free status] —
Total Memory Bits [DATA_NEEDED: embedded RAM bits] —
DSP Blocks (18x18) [DATA_NEEDED: DSP block count] —
PLLs [DATA_NEEDED: PLL count] —
Transceivers [DATA_NEEDED: high-speed transceiver count] —
Temperature Grade Industrial —
Level ng MSL [DATA_NEEDED: MSL rating] —
Series — Stratix II
Adaptive Logic Modules (ALMs) — 30,220 (approx.)
Logic Array Blocks (LABs) — 3,022
Embedded Memory (bits) — 2,544,192
Embedded Memory Blocks — M512/M4K/M-RAM TriMatrix memory
DSP Blocks (18-bit x 18-bit) — Up to 48 (24 per DSP block column pair typical)
User I/Os — 718
Maximum Core Frequency — 711.24 MHz (per Arrow listing)
Core Voltage — 1.2 V
Operating Temperature Grade — Commercial (C4 suffix indicates commercial, speed grade 4)
Configuration Modes — Passive Serial, Fast Passive Parallel, JTAG
PLLs / Clock Networks — Yes - on-chip PLLs and global clock networks

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