EP2S60F484I5N vs EP2S60F484C3N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP2S60F484I5N sa pamamagitan ng Altera at EP2S60F484C3N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP2S60F484I5N EP2S60F484C3N
Brand Altera Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete NRND
Series Stratix II (EP2S60) —
Family Field Programmable Gate Array (FPGA) Stratix II
Logic Elements (LE) 60,440 —
Adaptive Logic Modules (ALM) 24,176 —
Embedded Memory (bits) 2,544,192 —
Embedded Memory (M512/M4K/M-RAM blocks) M512: 330, M4K: 255, M-RAM: 2 —
DSP Blocks (18-bit multipliers) 48 blocks (192 18x18 multipliers) —
PLLs 12 (4 enhanced + 8 fast) —
Maximum User I/O Pins 334 334
Maximum Fabric Clock 609.76 MHz —
Core Supply Voltage 1.2 V typical —
Process Technology 90 nm CMOS 90 nm CMOS, 1.2 V core
Packhaging 484-ball FC-FBGA (Flip-Chip Fine-pitch BGA), 1.00 mm pitch 484-BGA (F484), 1.0 mm pitch
Speed Grade I5 (industrial, slow-speed for low power) -3 (fastest commercial)
Hanay ng Temperature na Operasyon -40 °C to +100 °C (industrial) —
Uri ng Pagpapasok Surface Mount (BGA) —
Tindminan RoHS [DATA_NEEDED: rohs status not stated in verified data] Compliant
Lead-Free / Halogen-Free [DATA_NEEDED: lead-free / halogen-free status] —
Configuration Interface JTAG (IEEE 1149.1), Passive Serial, Fast Passive Parallel —
Design Tool Quartus II (legacy; current Intel Quartus Prime with Stratix II device support) —
Logic Elements — 60,440
Adaptive LUTs (ALUTs) — 48,352
Embedded Memory (TriMatrix) — 2,544 Kbits (M4K + M512 + M-RAM)
Embedded DSP Blocks — 12 (48 GMACs at 450 MHz)
Operating Temperature (Commercial) — 0C to +85C (TJ)
Supply Voltage VCCINT — 1.2 V nominal
Configuration Modes — FPP, AS, PS, JTAG
Level ng MSL — 3 (per JEDEC J-STD-020)
Lead-Free — Yes

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