EP2S60F672C3 vs EP2S60F672C4 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2S60F672C3 sa pamamagitan ng Altera at EP2S60F672C4 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2S60F672C3 | EP2S60F672C4 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Family | Stratix II | Stratix II |
| Logic Elements | 60,440 | — |
| Adaptive Logic Modules (ALMs) | [DATA_NEEDED: ALM count] | — |
| Total RAM Bits | 2,544,192 | — |
| Embedded Multiplier Blocks | [DATA_NEEDED: 9x9 multiplier count] | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | [DATA_NEEDED: DSP block count per Stratix II variant] |
| User I/Os | 492 | 492 |
| PLLs | 4 | — |
| Global Clocks | [DATA_NEEDED: global clock count] | — |
| Process Technology | 90 nm CMOS | 90 nm |
| Core Voltage | 1.2 V | 1.2 V (typical) |
| Speed Grade | C3 | C4 |
| Packhaging | 672-BBGA, FC-FBGA, 35 x 35 mm, 1.0 mm pitch | 672-BBGA, FCBGA |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Configuration Modes | PS, PPS, PPA, FPP, JTAG | — |
| Temperature na Operasyon | 0C to +85C (commercial) | 0C to +85C (commercial) |
| Level ng MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: not in provided data] |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: not confirmed in provided data] |
| Logic Elements (LE) | — | 60440 |
| Embedded Memory Bits | — | 2544192 |
| Logic Array Blocks (LAB) | — | 3022 |
| Lead-Free | — | [DATA_NEEDED: not confirmed in provided data] |