EP2S60F672C3N vs EP2S60F672I3N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2S60F672C3N sa pamamagitan ng Intel at EP2S60F672I3N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP2S60F672I3N - Stratix II FPGA 60K LE 672-FBGA -40°C to 100°C | Altera
EP2S60F672I3N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP2S60F672C3N | EP2S60F672I3N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Huling Pagbili |
| Family | Stratix II | Stratix II |
| Logic Elements (LE) | 60,440 | 60,440 |
| Logic Array Blocks (LABs) | 3,022 | — |
| Adaptive Logic Modules (ALMs) | 24,176 | — |
| Total Embedded Memory | 2,544,192 bits (2.5 Mbits) | — |
| User I/O Pins | 492 | — |
| User I/O Banks | 8 | — |
| Process Technology | 90 nm CMOS | 90 nm |
| Core Supply Voltage (VCCINT) | 1.2 V | — |
| I/O Supply Voltage (VCCIO) | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent) | — |
| Pre-Driver Supply (VCCPD) | 3.3 V | — |
| Maximum Internal Clock Frequency | 816.99 MHz | — |
| PLLs | 4 | 12 |
| Global Clock Networks | 16 | — |
| Packhaging | 672-pin FC-FBGA | 672-ball FC-FBGA |
| Uri ng Pagpapasok | Surface Mount | — |
| Temperature na Operasyon | 0C to +85C (commercial grade) | — |
| Speed Grade | C3 (slower speed grade) | I3 |
| Tindminan RoHS | unknown | — |
| Lead-Free | unknown | — |
| Adaptive Logic Modules (ALM) | — | 24,176 |
| ALUTs | — | 48,352 |
| Embedded Memory (bits) | — | 2,544,192 |
| DSP Blocks | — | 36 |
| 18×18 Multipliers | — | 144 |
| Maximum User I/O | — | 718 (package dependent) |
| Core Voltage | — | 1.2 V |
| Internal Clock Frequency (max) | — | 816.99 MHz |
| Operating Temperature (Industrial) | — | -40°C to +100°C |