EP2S60F672C4N vs EP2S60F672I3N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2S60F672C4N sa pamamagitan ng Intel at EP2S60F672I3N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP2S60F672I3N - Stratix II FPGA 60K LE 672-FBGA -40°C to 100°C | Altera
EP2S60F672I3N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP2S60F672C4N | EP2S60F672I3N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | Stratix II | Stratix II |
| Process Technology | 90 nm | 90 nm |
| Logic Elements (LE) | 60,440 | 60,440 |
| Adaptive Logic Modules (ALM) | 24,176 | 24,176 |
| Embedded Memory (bits) | 2,544,192 | 2,544,192 |
| Embedded Multiplier Blocks | [DATA_NEEDED: 9x9 multiplier count] | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | 36 |
| Maximum User I/O | 492 | 718 (package dependent) |
| Core Voltage | 1.2 V | 1.2 V |
| Maximum Fabric Clock | 711.24 MHz | — |
| Packhaging | 672-pin FC-FBGA | 672-ball FC-FBGA |
| Package Type | FineLine Ball-Grid Array | — |
| Speed Grade | C4 (commercial) | I3 |
| Temperature na Operasyon | 0C to +85C (commercial) | — |
| Configuration Method | JTAG, Fast Passive Parallel, Active Serial | — |
| Uri ng Pagpapasok | Surface Mount | — |
| Level ng MSL | 3 | — |
| Lead-Free / RoHS | Yes (lead-free finish) | — |
| ALUTs | — | 48,352 |
| 18×18 Multipliers | — | 144 |
| PLLs | — | 12 |
| Internal Clock Frequency (max) | — | 816.99 MHz |
| Operating Temperature (Industrial) | — | -40°C to +100°C |