EP2S60F672C5N vs EP2S60F672I3N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2S60F672C5N sa pamamagitan ng Altera at EP2S60F672I3N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP2S60F672I3N - Stratix II FPGA 60K LE 672-FBGA -40°C to 100°C | Altera
EP2S60F672I3N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP2S60F672C5N | EP2S60F672I3N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | Stratix II | Stratix II |
| Logic Elements (LEs) | 60440 | — |
| Logic Array Blocks (LABs) | 3022 | — |
| Embedded Memory (bits) | 2544192 | 2,544,192 |
| Maximum User I/Os | 492 | — |
| Process Technology | 90 nm | 90 nm |
| Core Voltage (VCCINT) | 1.2 V | — |
| Maximum Internal Frequency | 609.76 MHz | — |
| Packhaging | 672-ball FC-FBGA | 672-ball FC-FBGA |
| Uri ng Pagpapasok | Surface Mount | — |
| Speed Grade | C5 (commercial) | I3 |
| Temperature Grade | Commercial | — |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Tindminan RoHS | Non-compliant (contains lead, per Altera/Intel EOL notice) | — |
| Configuration Memory | SRAM-based (volatile, requires external configuration device) | — |
| Logic Elements (LE) | — | 60,440 |
| Adaptive Logic Modules (ALM) | — | 24,176 |
| ALUTs | — | 48,352 |
| DSP Blocks | — | 36 |
| 18×18 Multipliers | — | 144 |
| PLLs | — | 12 |
| Maximum User I/O | — | 718 (package dependent) |
| Core Voltage | — | 1.2 V |
| Internal Clock Frequency (max) | — | 816.99 MHz |
| Operating Temperature (Industrial) | — | -40°C to +100°C |