EP2S90F780C5 vs EP2S130F780C4 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2S90F780C5 sa pamamagitan ng Altera at EP2S130F780C4 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2S90F780C5 | EP2S130F780C4 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Series | Stratix II | — |
| Family | Stratix II FPGA | Stratix II |
| Logic Elements | 90,960 | 132,540 |
| Logic Array Blocks / ALMs | 4,548 | — |
| Embedded RAM (Total RAM Bits) | 4,520,488 | — |
| Embedded Multiplier / DSP Blocks | [DATA_NEEDED: DSP block count and 18x18 multiplier count] | — |
| User I/O Pins | 534 | 534 |
| Core Voltage | 1.15 V to 1.25 V | 1.2 V |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Internal Operating Frequency (max) | 609.76 MHz | — |
| Package Type | 780-ball FC-FBGA (FineLine BGA) | — |
| Package Dimensions | 29 x 29 mm | — |
| Ball Pitch | 1.0 mm | 1.0 mm |
| Temperature na Operasyon | 0 C to 85 C (Commercial) | — |
| Speed Grade | C5 | C4 (commercial) |
| Configuration Modes | Passive Serial, Fast Passive Parallel, JTAG | — |
| PLLs | 4 enhanced + up to 8 fast PLLs | — |
| Tindminan RoHS | RoHS non-compliant (per alterachips listing) | Lead-free (per datasheet) |
| Lead Free Status | [DATA_NEEDED: lead-free per JEDEC J-STD-609] | — |
| Logic Array Blocks (LABs) | — | 6,627 |
| Internal Frequency (max) | — | 717 MHz |
| Packhaging | — | 780-ball FC-FBGA (flip-chip) |
| Package Code | — | F (FBGA-780) |
| Package Body Size | — | 40 x 40 mm |
| Terminal Form | — | Ball (BGA) |
| Uri ng Pagpapasok | — | Surface Mount |