EP2SGX130GF40C3NES vs EP2SGX130GF1508C3 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2SGX130GF40C3NES sa pamamagitan ng Altera at EP2SGX130GF1508C3 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP2SGX130GF40C3NES - Stratix II GX FPGA, 132K LE, 6.375Gbps | Altera
EP2SGX130GF40C3NES Obsolete
Pagsanggunian na paghahambing
| Parametro | EP2SGX130GF40C3NES | EP2SGX130GF1508C3 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | Stratix II GX | Stratix II GX |
| Logic Elements | 132540 | 132,540 |
| Logic Array Blocks (LABs) | 7047 | 6,627 |
| Maximum Internal Frequency | 778.82 MHz | 717 MHz |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Core Voltage | 1.2 V | 1.2 V |
| Transceiver Channels | 4 to 20 (per device family configuration) | Up to 20 |
| Maximum Transceiver Data Rate | 6.375 Gbps | — |
| Transceiver Feature | Embedded SERDES with Clock/Data Recovery (CRU) | — |
| Uri ng Memory | TriMatrix embedded memory (distributed RAM, block RAM, shift register) | — |
| Packhaging | 1508-ball FC-FBGA (40 x 40 mm, 1 mm pitch) | 1508-ball FBGA (FCBGA) 40 x 40 mm, 1.0 mm pitch |
| Operating Temperature Grade | Commercial Extended | Commercial (C3 speed grade) |
| Terminal Form | Ball (BGA) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | Lead-free compliant (per package code MS-034AAU-1) | Contains lead / RoHS non-compliant |
| Series | EP2SGX130 | — |
| Total Memory Bits | — | 6,748,860 |
| Maximum User I/O | — | 734 |
| Number of I/O Banks | — | 12 |
| Level ng MSL | — | [DATA_NEEDED: MSL rating] |