EP2SGX30DF780C7N vs EP2SGX30FG780C7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2SGX30DF780C7N sa pamamagitan ng Altera at EP2SGX30FG780C7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP2SGX30FG780C7 - Stratix II GX 30K LEs FPGA with 4.6G Transceivers | Altera
EP2SGX30FG780C7 ObsoletePagsanggunian na paghahambing
| Parametro | EP2SGX30DF780C7N | EP2SGX30FG780C7 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | Stratix II GX | Stratix II GX |
| Logic Elements | 33,880 | 33,880 |
| Embedded Memory (bits) | 1,369,728 | — |
| Total Block RAM (M512 + M4K + M-RAM) | 361 blocks | — |
| Maximum User I/O | 361 | — |
| Transceiver Data Rate | 3.125 Gbps | — |
| Number of Transceivers | [DATA_NEEDED: transceiver count] | — |
| Embedded Multipliers (18x18) | [DATA_NEEDED: multiplier count] | 192 |
| PLLs | [DATA_NEEDED: PLL count] | — |
| Global Clocks | [DATA_NEEDED: global clock count] | — |
| Process Technology | 90 nm | — |
| Speed Grade | C7 (standard) | C7 (commercial) |
| Temperature na Operasyon | [DATA_NEEDED: temperature grade] | 0C to +85C (commercial) |
| Packhaging | 780-ball FineLine BGA (DF) | 780-pin FineLine BGA (FG780) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Level ng MSL | [DATA_NEEDED: MSL rating] | — |
| Tindminan RoHS | Compliant (per Altera product family) | [DATA_NEEDED: RoHS status - not present in verified web data] |
| Supply Voltage (Core) | [DATA_NEEDED: Vcore value] | — |
| Adaptive Logic Modules (ALMs) | — | 13,224 |
| Embedded Memory | — | 2.1 Mbits (TriMatrix) |
| Multi-Gigabit Transceivers | — | 4 (up to 6.375 Gbps) |
| User I/O Pins | — | 364 |
| Core Voltage | — | 0.85 V (typical, see datasheet) |
| Process Node | — | 90 nm |
| Hard IP Blocks | — | PCIe, CDR, PLLs |