EP2SGX30DF780I3N vs EP2SGX30DF780I4 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2SGX30DF780I3N sa pamamagitan ng Intel at EP2SGX30DF780I4 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP2SGX30DF780I4 - 33,880 Logic Cells Stratix II GX FPGA | Intel
EP2SGX30DF780I4 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP2SGX30DF780I3N | EP2SGX30DF780I4 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Huling Pagbili |
| Family | Stratix II GX | Stratix II GX |
| Logic Elements | 33,880 | — |
| Logic Cells | 33,380 | — |
| Configurable Logic Blocks (CLBs) | 33,880 | — |
| Total Memory Bits | 1,369,728 | — |
| Maximum Core Frequency | 622.08 MHz | — |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Core Supply Voltage | 1.2 V | — |
| User I/O Pins | 361 | — |
| Packhaging | 780-ball FBGA (Fine-Pitch BGA), 29 x 29 mm, 1 mm pitch | 780-ball FC-FBGA, 29x29 mm, 1 mm pitch |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (Flip-chip BGA) |
| Operating Temperature Grade | Industrial | — |
| Lead Free | Yes | — |
| Tindminan RoHS | Compliant | [DATA_NEEDED: RoHS status] |
| Speed Grade | I3 | — |
| Series | — | Stratix II GX |
| Logic Elements / Cells | — | 33,880 |
| Total RAM Bits | — | 1,369,728 |
| Number of LABs | — | 1,694 |
| User I/O Count | — | 361 |
| Number of I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Nominal Supply Voltage (Core) | — | 1.2 V |
| Internal Operating Frequency | — | 622 MHz |
| Maksimum na Taktiko ng Oras | — | 717 MHz |
| Temperature na Operasyon | — | -40C to +85C (Industrial) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |
| Number of Transceivers | — | [DATA_NEEDED: number of transceiver channels] |
| Number of PLLs / DLLs | — | [DATA_NEEDED: number of PLLs] |