EP2SGX90EF1152I4 vs EP2SGX90EF35C4NES Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2SGX90EF1152I4 sa pamamagitan ng Altera at EP2SGX90EF35C4NES sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP2SGX90EF1152I4 - Stratix II GX FPGA, 90K LE, 1152-BGA | Intel / Altera
EP2SGX90EF1152I4 Nrnd
Pagsanggunian na paghahambing
| Parametro | EP2SGX90EF1152I4 | EP2SGX90EF35C4NES |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Family | Stratix II GX | Stratix II GX |
| Series | Stratix II | — |
| Logic Elements (LE) | 90,960 | — |
| LABs/CLBs | 4,548 | — |
| Total Memory Bits | 4,520,448 | — |
| User I/O Count | 558 | — |
| Operating Temperature Grade | Industrial (I4): -40C to +100C | — |
| Core Voltage | 1.2 V | 1.2 V |
| Process Technology | 90 nm | 90 nm CMOS |
| Maximum Internal Clock Frequency | 732.1 MHz | — |
| Packhaging | 1152-ball FC-FBGA | FBGA-35 / 1152-ball BGA family |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Pb-free (N suffix indicates lead-free assembly) |
| Integrated Transceivers | Yes (multi-gigabit, Stratix II GX family feature) | — |
| Logic Elements | — | Approximately 90,000 |
| Embedded Memory | — | Up to 4.5 Mbits (M4K + M-RAM blocks) |
| Transceivers | — | 12 multi-gigabit transceivers |
| Transceiver Data Rate | — | Up to 6.375 Gbps |
| Hardware Multipliers | — | Up to 192 (18x18) |
| MultiVolt I/O | — | Supports 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Speed Grade | — | C4 (commercial-extended) |
| Temperature na Operasyon | — | Commercial Extended (0C to +85C) [DATA_NEEDED: exact lower/upper bound] |
| PLLs | — | Up to 8 (4 quadrants) |
| Configuration Method | — | Serial / Passive parallel / Fast passive parallel |