EP2SGX90FF40C5NES vs EP2SGX90EF35C5NES Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2SGX90FF40C5NES sa pamamagitan ng Altera at EP2SGX90EF35C5NES sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2SGX90FF40C5NES | EP2SGX90EF35C5NES |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | NRND |
| Family | Stratix II GX | Stratix II GX |
| Series | EP2SGX90 | — |
| Logic Elements | 90,960 | 90960 |
| Configurable Logic Blocks (CLBs) | 4,828 | 4828 |
| Process Technology | 90 nm CMOS | 90 nm CMOS |
| Core Voltage | 1.2 V | 1.2 V |
| Maximum Core Frequency | 609.76 MHz | — |
| Packhaging | 1508-pin FC-FBGA | 35-ball Plastic BGA (S-PBGA-B35) |
| Uri ng Pagpapasok | Surface Mount (flip-chip BGA) | — |
| Temperature Grade | Commercial Extended | Commercial Extended |
| Embedded Transceivers | Multi-gigabit transceiver (CMU) channels | — |
| On-chip Memory | M512/M4K/M-RAM blocks (TriMatrix memory) | — |
| DSP Blocks | Embedded multiplier/accumulator DSP blocks | — |
| PLL Count | Multiple PLLs with dedicated analog supply pins | — |
| Tindminan RoHS | Compliant (lead-free) | Compliant |
| Speed Grade | C5 | — |
| Adaptive Logic Modules (ALMs) | — | 4594 |
| Maximum Transceiver Data Rate | — | 6.375 Gbps |
| Number of Transceivers | — | 12 |
| Maximum Operating Frequency | — | 609.76 MHz |
| Package Type | — | Plastic Ball Grid Array |
| Terminal Count | — | 35 |
| Configuration Method | — | JTAG / Enhanced configuration device |