EP3C10E144C7N vs EP3C5E144C7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3C10E144C7N sa pamamagitan ng Intel at EP3C5E144C7N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP3C10E144C7N | EP3C5E144C7N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Cyclone® III | — |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements (LEs) | 10,320 | — |
| Embedded Memory (M9K BRAM) | 414 Kbits | — |
| Embedded 18x18 Multipliers | 23 | 46 |
| Maximum User I/Os | 94 | — |
| PLLs | 4 | 4 |
| Core Voltage (VCCINT) | 1.15 V to 1.25 V | — |
| Maximum Internal Clock Frequency | 437.5 MHz | — |
| Packhaging | 144-pin LQFP Exposed Pad (EQFP-144) | 144-LQFP Exposed Pad (EQFP-144), 22x22 mm, 0.5 mm pitch |
| Process Technology | TSMC 65 nm low-power CMOS | TSMC 65 nm low-power |
| Configuration Modes | JTAG, Active Serial, Active Parallel | AS, PS, FPP, JTAG |
| Temperature ng Junction na Operasyon | 0C to +85C (Commercial, C7 speed grade) | 0C to +85C |
| I/O Standards Supported | LVDS, LVCMOS, SSTL, HSTL (per bank VCCIO) | — |
| Tindminan RoHS | Compliant | Compliant |
| Device Family | — | Cyclone III |
| Logic Elements (LE) | — | 5,136 |
| Logic Array Blocks (LAB) | — | 290 |
| Total Memory Bits | — | 423,936 |
| Embedded M9K Memory Blocks | — | 46 |
| User I/Os | — | 94 |
| Speed Grade | — | C7 (7 ns delay) |
| I/O Standards | — | LVDS, SSTL, HSTL, LVCMOS, PCI/PCI-X |