EP3C120F484C7N vs EP3C80F484C7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3C120F484C7N sa pamamagitan ng Intel at EP3C80F484C7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP3C120F484C7N | EP3C80F484C7 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Unknown |
| Family | Cyclone III | Cyclone III |
| Logic Elements (LE) | 119,088 | — |
| Embedded Memory Bits | 3,981,312 | — |
| Embedded 18x18 Multipliers | 283 | — |
| Maximum Operating Frequency | 472 MHz | — |
| PLLs | 4 | — |
| Global Clock Networks | 20 | — |
| Process Technology | 65 nm | — |
| Core Voltage | 1.2 V | — |
| I/O Voltage Range | 1.2 V to 3.3 V | — |
| Packhaging | 484-ball FBGA (FineLine BGA), 23 x 23 mm, 1.0 mm pitch | 484-BGA |
| Operating Temperature Grade | Commercial (C7) | — |
| Configuration Scheme | Active Serial (AS), Passive Serial (PS), JTAG | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | Compliant | [DATA_NEEDED: RoHS status] |
| Device Type | — | Field Programmable Gate Array (FPGA) |
| Logic Cells | — | 81264 cells |
| Memory | — | 2810880 bit |
| User I/O | — | 295 I/O |
| Logic Array Blocks | — | 5079 LABs |
| Technology | — | 65 nm |
| Stated Frequency | — | 437.5 MHz |
| Volte ng Pagbibigay | — | 1.2 V |
| Bilang ng Pin | — | 484 pins |
| Configuration | — | FPGA programmable after assembly |
| REACH Status | — | [DATA_NEEDED: REACH status] |
| AEC-Q100 Qualification | — | [DATA_NEEDED: AEC-Q100 qualification] |