EP3C120F484C7N vs EP3CLS150F484C7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3C120F484C7N sa pamamagitan ng Intel at EP3CLS150F484C7N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP3C120F484C7N | EP3CLS150F484C7N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Cyclone III | Cyclone III LS |
| Logic Elements (LE) | 119,088 | 150,848 |
| Embedded Memory Bits | 3,981,312 | — |
| Embedded 18x18 Multipliers | 283 | — |
| Maximum Operating Frequency | 472 MHz | — |
| PLLs | 4 | 4 |
| Global Clock Networks | 20 | — |
| Process Technology | 65 nm | 65 nm |
| Core Voltage | 1.2 V | 1.2 V |
| I/O Voltage Range | 1.2 V to 3.3 V | — |
| Packhaging | 484-ball FBGA (FineLine BGA), 23 x 23 mm, 1.0 mm pitch | 484-pin FBGA (1.0 mm pitch) |
| Operating Temperature Grade | Commercial (C7) | C (0 °C to 85 °C) |
| Configuration Scheme | Active Serial (AS), Passive Serial (PS), JTAG | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | Compliant | — |
| Logic Array Blocks (LAB) | — | 9,428 |
| Total Memory Bits | — | 6,137,856 |
| DSP Blocks | — | 210 |
| Maximum User I/O | — | 226 |
| Maximum Internal Frequency | — | 437.5 MHz |
| Configuration Method | — | JTAG / Passive Serial / Active Serial |
| Bitstream Encryption | — | AES-128 supported |