EP3C120F780C8NAE vs EP3C120F780C7AD Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3C120F780C8NAE sa pamamagitan ng Altera at EP3C120F780C7AD sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP3C120F780C8NAE | EP3C120F780C7AD |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Aktibo |
| Family | Cyclone III | Cyclone III |
| Logic Elements | 119,088 | — |
| Embedded Memory (bits) | 3,981,312 | 3,981,312 (498 Kbytes total) |
| Embedded 18x18 Multipliers | 531 | — |
| PLLs | 4 | 4 |
| Maximum User I/O Pins | 531 | — |
| Speed Grade | 8 (commercial) | — |
| Packhaging | 780-ball FBGA (FineLine BGA) | FBGA-780 (F780) |
| Package Pitch | 1.0 mm | — |
| Package Size | 29 x 29 mm | — |
| Process Node | 65 nm | — |
| Core Voltage | 1.2 V (typ) | 1.2 V (nominal) |
| Temperature na Operasyon | -40C to +85C (industrial) | 0C to +85C (commercial) |
| Configuration Modes | JTAG, AS, AP, PS | JTAG, Active Serial, Passive Serial |
| Tindminan RoHS | Pb-free (lead-free per 'N' suffix) | Compliant |
| Memory Interfaces | DDR, DDR2, QDR II SRAM | — |
| Device | — | EP3C120 |
| Logic Elements (LE) | — | 119,088 |
| Embedded Memory Blocks | — | M9K x 432 |
| 18x18 Multipliers | — | 288 |
| Global Clock Networks | — | 20 |
| Maximum User I/O | — | 531 |
| Process Technology | — | 65 nm low-power |
| Package Dimensions | — | 29 mm x 29 mm, 1.0 mm pitch |
| Design Security | — | AES 128-bit |