EP3C120F780C8NAE vs EP3C120F780I7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3C120F780C8NAE sa pamamagitan ng Altera at EP3C120F780I7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP3C120F780C8NAE | EP3C120F780I7 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Aktibo |
| Family | Cyclone III | Cyclone III |
| Logic Elements | 119,088 | 119,088 |
| Embedded Memory (bits) | 3,981,312 | — |
| Embedded 18x18 Multipliers | 531 | — |
| PLLs | 4 | 4 |
| Maximum User I/O Pins | 531 | — |
| Speed Grade | 8 (commercial) | 7 |
| Packhaging | 780-ball FBGA (FineLine BGA) | 780-ball FBGA (F780), 29x29 mm, 1.0 mm pitch |
| Package Pitch | 1.0 mm | — |
| Package Size | 29 x 29 mm | — |
| Process Node | 65 nm | — |
| Core Voltage | 1.2 V (typ) | 1.2 V |
| Temperature na Operasyon | -40C to +85C (industrial) | -40C to +100C (industrial, "I" grade) |
| Configuration Modes | JTAG, AS, AP, PS | — |
| Tindminan RoHS | Pb-free (lead-free per 'N' suffix) | Compliant |
| Memory Interfaces | DDR, DDR2, QDR II SRAM | — |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Logic Array Blocks (LABs) | — | 7,443 |
| Total Memory Bits | — | 3,981,312 |
| Embedded Multipliers (18x18) | — | 288 |
| User I/O Pins | — | 531 |
| Global Clock Networks | — | 20 |
| Process Technology | — | 65 nm CMOS |
| Internal Frequency | — | 472 MHz (max) |