EP3C40F484C8N vs EP3C40F484C8 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3C40F484C8N sa pamamagitan ng Altera at EP3C40F484C8 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP3C40F484C8N | EP3C40F484C8 |
|---|---|---|
| Brand | Altera | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Huling Pagbili |
| Family | Cyclone III | — |
| Logic Elements | 39,600 | — |
| Logic Array Blocks (LABs) | 2,475 | — |
| Embedded Memory | 1,161,216 bits (1134 Kbit M9K RAM) | — |
| Embedded 18×18 Multipliers | 126 | — |
| User I/Os | 331 | — |
| PLLs | 4 | 4 |
| Global Clock Networks | 20 | — |
| Process Technology | TSMC 65 nm low-power CMOS | — |
| Core Voltage (VCCINT) | 1.15 V to 1.25 V | — |
| Packhaging | 484-FBGA (23×23 mm, 1.0 mm pitch) | 484-ball FBGA (F484), 1.0 mm pitch, 23 x 23 mm |
| Speed Grade | 8 (commercial) | C8 (commercial, mid-speed) |
| Temperature na Operasyon | -40C to +85C (industrial) | 0C to +85C (commercial) |
| Uri ng Pagpapasok | Surface Mount (BGA) | — |
| Tindminan RoHS | Lead-free / RoHS compliant | Compliant (lead-free FBGA) |
| Configuration Modes | AS, AP, PS, JTAG | — |
| LVDS Data Rate | Up to 875 Mbps per pair | — |
| Device Family | — | Cyclone III |
| Logic Elements (LE) | — | 39,600 |
| Logic Array Blocks (LAB) | — | 2,475 |
| Embedded Memory (bits) | — | 1,161,216 |
| M9K Memory Blocks | — | 126 |
| Embedded 18x18 Multipliers | — | 56 |
| Maximum User I/O | — | 331 |
| User I/O Banks | — | 8 |
| Process Node | — | 60 nm TSMC low-power CMOS |
| Supply Voltage (Core) | — | 1.2 V |
| Configuration Scheme | — | Active serial (AS), Passive serial (PS), JTAG |
| Level ng MSL | — | 3 (per JEDEC J-STD-020) |