EP3C40F484C8N vs EP3C40U484C7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3C40F484C8N sa pamamagitan ng Altera at EP3C40U484C7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP3C40F484C8N | EP3C40U484C7 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | NRND |
| Family | Cyclone III | Cyclone III |
| Logic Elements | 39,600 | 39,600 |
| Logic Array Blocks (LABs) | 2,475 | — |
| Embedded Memory | 1,161,216 bits (1134 Kbit M9K RAM) | — |
| Embedded 18×18 Multipliers | 126 | — |
| User I/Os | 331 | — |
| PLLs | 4 | 4 |
| Global Clock Networks | 20 | — |
| Process Technology | TSMC 65 nm low-power CMOS | 65 nm TSMC low-power |
| Core Voltage (VCCINT) | 1.15 V to 1.25 V | — |
| Packhaging | 484-FBGA (23×23 mm, 1.0 mm pitch) | 484-FBGA (UBGA) |
| Speed Grade | 8 (commercial) | — |
| Temperature na Operasyon | -40C to +85C (industrial) | 0C to +85C (commercial) |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Tindminan RoHS | Lead-free / RoHS compliant | Compliant |
| Configuration Modes | AS, AP, PS, JTAG | — |
| LVDS Data Rate | Up to 875 Mbps per pair | — |
| Embedded Memory (bits) | — | 1,161,216 |
| Embedded Memory (M9K blocks) | — | 126 |
| Embedded Multipliers (18x18) | — | 126 |
| User I/O Count | — | 331 |
| Core Voltage | — | 1.2 V |
| Configuration | — | SRAM-based, JTAG/AS supported |
| Level ng MSL | — | 3 (168 hours) |