EP3C80U484C7 vs EP3C80U484C6N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3C80U484C7 sa pamamagitan ng Intel at EP3C80U484C6N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP3C80U484C6N - Cyclone III FPGA 81K LE 295 I/O | Altera | 484-UBGA
EP3C80U484C6N ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EP3C80U484C7 | EP3C80U484C6N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Series | Cyclone III | — |
| Family | EP3C80 | Cyclone III |
| Logic Elements | 81,264 | — |
| Embedded Memory | 2,810,880 bits (295 M9K blocks) | — |
| Embedded 18x18 Multipliers | 244 | — |
| PLLs | 4 | 4 |
| Maximum User I/O Pins | 429 (approximate, package-dependent) | — |
| Packhaging | 484-FBGA (UBGA) | 484-UBGA (Ultra FineLine BGA) |
| Speed Grade | -7 (commercial) | C6 (commercial) |
| Core Voltage | 1.2 V | 1.2 V |
| I/O Voltage Range | 1.2 V to 3.3 V | 1.2 V to 3.3 V |
| Process Technology | 65 nm low-power CMOS | 65 nm TSMC low-power |
| Temperature ng Junction na Operasyon | 0 C to 85 C (commercial) | — |
| Configuration Modes | Passive Serial, Active Serial, JTAG, AES-encrypted bitstream | — |
| Memory Interface Support | DDR, DDR2, QDRII SDRAM | — |
| I/O Standards | LVDS, LVTTL, LVCMOS, SSTL, HSTL | — |
| Tindminan RoHS | Compliant | RoHS Compliant |
| Logic Elements (LE) | — | 81,264 |
| Total Memory Bits | — | 2,810,880 bits |
| Maximum User I/O | — | 295 |
| Total RAM Blocks | — | 397 M9K blocks |
| 18x18 Hardware Multipliers | — | 250 |
| Temperature na Operasyon | — | 0C to +85C (commercial) |
| Uri ng Pagpapasok | — | Surface Mount (BGA) |
| Lead Free | — | Lead Free |