EP3C80U484I7N vs EP3CLS100U484I7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3C80U484I7N sa pamamagitan ng Intel at EP3CLS100U484I7 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP3C80U484I7N | EP3CLS100U484I7 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Aktibo |
| Series | Cyclone III | — |
| Logic Elements | 81,264 | 100,448 |
| Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| Total RAM Bits | 2,810,880 bits (343.5 Kbit M9K equivalent) | 4,451,328 |
| Embedded Memory | M9K blocks (9 Kbit each) | — |
| Embedded 18 x 18 Multipliers | 244 | — |
| PLLs | 4 | 4 |
| User I/O Pins (maximum) | 295 | — |
| Maximum Internal Frequency | 437 MHz | — |
| Core Supply Voltage (VCCINT) | 1.2 V | — |
| Speed Grade | I7 (industrial, 100 C junction, fast speed) | — |
| Temperature na Operasyon | -40 C to +100 C (industrial) | — |
| Packhaging | 484-FBGA (UBGA-484), 19 x 19 mm, 0.8 mm pitch | — |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Process Technology | 65 nm low-power CMOS | TSMC 60 nm low-power |
| Configuration Modes | AS, PS, JTAG, FPP | — |
| Level ng MSL | 3 (168 hours) | — |
| Tindminan RoHS | Compliant | Compliant (Pb-free) |
| Family | — | Cyclone III LS |
| User I/O Count | — | 278 |
| Number of Terminals | — | 484 |
| Package Type | — | 484-FBGA (UBGA), 1.0 mm pitch |
| Volte ng Pagbibigay | — | 1.2 V core |
| Embedded 18x18 Multipliers | — | 66 |
| Global Clock Networks | — | 20 |
| Configuration Methods | — | AS, PS, FPP, JTAG |
| Operating Temperature Grade | — | Industrial (I7): -40C to +100C junction |