EP3CLS100F780I7 vs EP3C120F780I7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3CLS100F780I7 sa pamamagitan ng Intel at EP3C120F780I7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP3CLS100F780I7 | EP3C120F780I7 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Device Family | Cyclone III LS | — |
| Device Type | FPGA (Field Programmable Gate Array) | FPGA (Field Programmable Gate Array) |
| Logic Elements | 100,448 | 119,088 |
| Embedded Memory Bits | 4,451,328 bits (~4.4 Mbit) | — |
| Number of Logic Array Blocks | 47 (per distributor summary) | — |
| Number of Transceivers | 4 | — |
| Maximum User I/O | 413 | — |
| Packhaging | 780-ball FBGA (F780) | 780-ball FBGA (F780), 29x29 mm, 1.0 mm pitch |
| Supply Voltage (Core) | 1.2 V | — |
| Operating Temperature Grade | Industrial (-40C to +100C) | — |
| Process Technology | 60 nm low-power CMOS | 65 nm CMOS |
| Configuration Method | SRAM-based, JTAG or external flash (EPCS/EPCQ) | — |
| I/O Standards Supported | LVDS, LVCMOS, LVTTL, SSTL, HSTL | — |
| PLLs | Up to 8 (family maximum) | 4 |
| Security Features | 256-bit AES bitstream encryption, JTAG disable | — |
| Tindminan RoHS | Compliant | Compliant |
| Uri ng Pagpapasok | Surface Mount (BGA) | — |
| Family | — | Cyclone III |
| Logic Array Blocks (LABs) | — | 7,443 |
| Total Memory Bits | — | 3,981,312 |
| Embedded Multipliers (18x18) | — | 288 |
| User I/O Pins | — | 531 |
| Global Clock Networks | — | 20 |
| Core Voltage | — | 1.2 V |
| Internal Frequency | — | 472 MHz (max) |
| Temperature na Operasyon | — | -40C to +100C (industrial, "I" grade) |
| Speed Grade | — | 7 |