EP3CLS200F484I8N vs EP3CLS150F484I7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3CLS200F484I8N sa pamamagitan ng Intel at EP3CLS150F484I7N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP3CLS200F484I8N | EP3CLS150F484I7N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Cyclone III LS | Cyclone III LS |
| Device Type | FPGA | — |
| Logic Elements | 198,464 | 150,848 |
| Embedded Memory Bits | 8,211,456 | — |
| Maximum User I/O Pins | 230 (typical, package-dependent) | — |
| Process Technology | 65 nm | 65 nm low-power CMOS |
| Core Supply Voltage | 1.2 V | — |
| Maximum Operating Frequency | 402 MHz | — |
| Temperature na Operasyon | -40C to +100C (industrial) | -40C to +100C (Industrial, 'I') |
| Speed Grade | 8 | 7 |
| Packhaging | 484-ball FBGA (FineLine BGA) | FBGA-484 (FineLine BGA) |
| Uri ng Pagpapasok | Surface Mount | — |
| Number of PLLs | 4 | — |
| Number of Global Clock Networks | 20 | — |
| Tindminan RoHS | Compliant | — |
| Logic Array Blocks (LABs) | — | 9,428 |
| Embedded Memory (M9K blocks) | — | 6,137,856 bits (6.14 Mbit) |
| Embedded Multipliers (18x18) | — | 210 |
| PLLs | — | 4 |
| Global Clock Networks | — | 20 |
| Maximum User I/O | — | 210 |
| Core Voltage | — | 1.0 V (typical) |
| Lead-Free / RoHS | — | Yes (suffix 'N') |
| Configuration Schemes | — | AS, AP, PS, FPP, JTAG |
| Security Features | — | 256-bit AES bitstream encryption, JTAG secure mode, CRC |
| DSP Performance | — | Up to 450 MHz on 18x18 multipliers |