EP3SE110F1152C4LN vs EP3SE110F1152I4 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SE110F1152C4LN sa pamamagitan ng Intel at EP3SE110F1152I4 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP3SE110F1152C4LN | EP3SE110F1152I4 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Obsolete |
| Family | Stratix III E (Enhanced logic) | Stratix III E |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements (LE) | 107,500 | 107,500 |
| Logic Array Blocks (LAB) | 4,300 | — |
| Adaptive Logic Modules (ALM) | Yes | — |
| Embedded Memory (bits) | 8,936,448 | 8,936,448 |
| Maximum User I/O | 744 | — |
| Maximum Internal Clock Frequency | 717 MHz | — |
| Process Technology | 65 nm | — |
| Core Supply Voltage (VCCINT) | 0.9 V nominal (0.86 V to 0.94 V) | — |
| Temperature na Operasyon | 0 C to 85 C (commercial) | -40°C to +100°C (Industrial) |
| Packhaging | 1152-pin FC-FBGA (BBGA) | 1152-ball FCBGA (Flip-Chip BGA) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Device Type | FPGA - Field Programmable Gate Array | — |
| Configuration Method | JTAG / serial / parallel flash | — |
| Tindminan RoHS | Compliant | Compliant |
| Logic Array Blocks (LABs) | — | 4300 |
| DSP Blocks | — | 744 |
| User I/Os | — | 744 |
| Process Node | — | 40 nm |
| Maximum User I/O Speed | — | [DATA_NEEDED: maximum I/O toggle rate MHz] |
| PLLs | — | 24 |
| Configuration Modes | — | JTAG, Passive Serial (PS), Fast Passive Parallel (FPP), Active Serial (AS) |
| Memory Interface Support | — | DDR3, DDR2, QDRII+, RLDRAM II |
| Transceiver Protocol Support | — | PCIe Gen1/Gen2, Gbit Ethernet, XAUI, Serial RapidIO |
| Lead-Free | — | Yes |
| Level ng MSL | — | [DATA_NEEDED: MSL rating] |