EP3SE260F1152C2 vs EP3SE110F1152C2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SE260F1152C2 sa pamamagitan ng Intel at EP3SE110F1152C2 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP3SE110F1152C2 - Stratix III E FPGA, 107K LE, 1152-FCBGA | Intel
EP3SE110F1152C2 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP3SE260F1152C2 | EP3SE110F1152C2 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Manufacturer | Intel (formerly Altera) | — |
| Series | Stratix® III E | — |
| Logic Elements (LE) | 255,000 | — |
| Logic Array Blocks (LABs) | 10,200 | 4,300 |
| Embedded Memory (bits) | 16,672,768 | 8,936,448 |
| User I/Os | 744 | — |
| User I/O Banks | [DATA_NEEDED: I/O bank count] | — |
| Core Voltage (VCCINT) | 1.1 V | — |
| Process Technology | 65 nm CMOS | 65 nm |
| Packhaging | 1152-ball FC-FBGA (Flip Chip) | 1152-ball FC-BGA |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Speed Grade | C2 (commercial) | — |
| Temperature na Operasyon | Commercial (0 °C to +85 °C junction) [DATA_NEEDED: exact TJ limits] | 0C to 85C (Commercial) |
| Tindminan RoHS | Compliant | — |
| Lead-Free | Yes | — |
| Level ng MSL | [DATA_NEEDED: MSL rating] | — |
| Design Software | Quartus II (Stratix III support) | — |
| Family | — | Stratix III E (Enhanced) |
| Logic Elements | — | 107,500 |
| Adaptive Logic Modules (ALMs) | — | 53,750 |
| Maximum User I/Os | — | 744 |
| Core Voltage | — | 0.9 V |
| Maximum Internal Frequency | — | 800 MHz |
| Package Code | — | F1152 |
| Device Type | — | FPGA |
| Configuration | — | SRAM-based, volatile (requires configuration device) |