EP3SE260H780C2N vs EP3SE260H780C2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SE260H780C2N sa pamamagitan ng Intel at EP3SE260H780C2 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP3SE260H780C2N - Stratix III E FPGA 255K LE, 780-BGA | Intel
EP3SE260H780C2N ⚠ Huling PagbiliAltera
EP3SE260H780C2 - Stratix III E 260K LE FPGA | Altera | 780-BGA
EP3SE260H780C2 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP3SE260H780C2N | EP3SE260H780C2 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Huling Pagbili |
| Series | Stratix III E | Stratix III |
| Logic Elements | 255,000 | — |
| LABs / CLBs | 10,200 | — |
| Total RAM Bits | 16,672,768 | — |
| User I/O Count | 488 | — |
| Number of Transceivers | [DATA_NEEDED: transceiver count] | — |
| Core Voltage | 0.9 V | 0.86 V to 1.15 V |
| Packhaging | 780-BGA FCBGA | 780-BBGA, FCBGA |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Hanay ng Temperature na Operasyon | Commercial (0C to +85C) | — |
| Speed Grade | C2 | — |
| Level ng MSL | 3 (168 hours) | 3 (per JEDEC J-STD-020) |
| Reflow Peak Time Max | 40 s | — |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | Compliant |
| Lead-Free | [DATA_NEEDED: lead-free] | — |
| Package Code | BGA | — |
| Terminal Form | Ball | — |
| Number of Terminals | 780 | — |
| Process Node | 40 nm | 65 nm |
| Family | — | Stratix® III E |
| Logic Elements (LE) | — | 255,000 |
| Adaptive Logic Modules (ALM) | — | 102,000 |
| Embedded Memory (bits) | — | 16,672,768 |
| User I/Os | — | 488 |
| Number of LABs/CLBs | — | 10,200 |
| Temperature na Operasyon | — | 0C to +85C (Commercial) |
| Lead Free | — | Yes |