EP3SE260H780C4LN vs EP3SE260H780C4N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SE260H780C4LN sa pamamagitan ng Intel at EP3SE260H780C4N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP3SE260H780C4LN - Stratix III E FPGA 255K LE 780-FCBGA | Intel
EP3SE260H780C4LN ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP3SE260H780C4LN | EP3SE260H780C4N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | NRND |
| Family | Stratix III E | Stratix III E (Enhanced) |
| Logic Elements | 255,000 | 255,000 |
| Embedded Memory | 16,672,768 bits (16.67 Mbit) | M9K and M144K blocks |
| Logic Array Blocks (LABs) | 10,200 | 10,200 |
| Embedded Multipliers (18x18) | 384 | — |
| User I/O Count | 488 | — |
| Packhaging | 780-ball FCBGA (FineLine BGA) | 780-ball FCBGA (Flip Chip BGA) |
| Speed Grade | C4 (commercial, moderate speed) | — |
| Temperature na Operasyon | 0C to +85C (commercial) | 0C to +85C (commercial) |
| Core Voltage (VCC) | 1.0 V | — |
| I/O Voltage (VCCIO) | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V (bank-dependent) | — |
| Auxiliary Voltage (VCCPD/VCCPT) | 2.5 V / 3.0 V | — |
| PLLs | 8 | 12 |
| Global Clock Networks | 16 | — |
| Process Node | 40 nm TSMC | 65 nm CMOS |
| Configuration Modes | FPP, AS, PS, JTAG | — |
| Tindminan RoHS | Compliant | — |
| Level ng MSL | 3 (168 hours) | — |
| Total RAM Bits | — | 16,672,768 |
| User I/O Pins | — | 488 |
| DSP Blocks (18x18 Multipliers) | — | 768 |
| Core Voltage | — | 0.86 V to 1.15 V |
| Maximum Core Clock Frequency | — | 450 MHz |
| Uri ng Pagpapasok | — | Surface Mount |
| Level ng Sensitivity sa Asid ng Moisture (MSL) | — | 3 (168 hours) |
| Configuration Method | — | Serial/Parallel via Quartus II |