EP3SE50F484C4LG vs EP3SE50F484C4N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SE50F484C4LG sa pamamagitan ng Intel at EP3SE50F484C4N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP3SE50F484C4LG | EP3SE50F484C4N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Family | Stratix® III E | Stratix III E |
| Logic Elements | 47,500 LE | 47,500 |
| Adaptive Logic Modules (ALMs) | 19,000 ALM | — |
| Embedded Memory | 5.49 Mbit (2,886 Kbit M9K + M144K blocks) | — |
| Maximum User I/O | 296 | — |
| Hardware Multipliers (18x18) | 384 | — |
| PLLs | 4 | — |
| Operating Supply Voltage (Core) | 1.1 V | — |
| Hanay ng Temperature na Operasyon | 0°C to +85°C (Commercial) | — |
| Speed Grade | -4 | — |
| Packhaging | 484-Ball FCBGA, 23 x 23 mm | 484-BBGA, FCBGA |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Process Node | 40 nm TSMC | — |
| Lead-Free / RoHS | Yes (lead-free finish, RoHS compliant) | — |
| Level ng MSL | 3 (per JEDEC J-STD-020) | — |
| Design Software | Quartus II 11.0 or later | — |
| Number of LABs/CLBs | — | 1,900 |
| Total RAM Bits | — | 5,760 Kbit |
| Number of I/O | — | 296 |
| Number of PLLs | — | 4 |
| Maximum Operating Frequency | — | 450 MHz |
| Core Voltage | — | 1.1 V |
| Process Technology | — | 65 nm |
| Temperature na Operasyon | — | 0C to +85C (Commercial) |
| Supplier Device Package | — | 484-FBGA (23x23 mm) |
| Tindminan RoHS | — | [DATA_NEEDED: rohs_status] |
| Lead Free | — | [DATA_NEEDED: lead_free_status] |
| Level ng Sensitivity sa Asid ng Moisture (MSL) | — | 3 (168 Hours) |