EP3SE50F484I3N vs EP3SE50F484I3G Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SE50F484I3N sa pamamagitan ng Intel at EP3SE50F484I3G sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP3SE50F484I3N | EP3SE50F484I3G |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | Stratix III E | Stratix III E |
| Logic Elements | 47,500 | 47,500 LE |
| Number of LABs | 1,900 | — |
| Total Memory Bits | 5,760,000 | — |
| Maximum User I/O | 296 | — |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Core Voltage VCC | 0.9 V | — |
| Auxiliary Voltage VCCAUX | 1.1 V | — |
| Process Technology | 65 nm | — |
| Maximum Internal Frequency | 500 MHz | — |
| Speed Grade | I3 (industrial, bin 3) | — |
| Temperature na Operasyon | -40C to +100C (industrial) | -40C to +100C (Industrial) |
| Packhaging | 484-pin FC-FBGA (flip-chip BGA) | 484-BBGA, FCBGA |
| Uri ng Pagpapasok | Surface Mount (BGA) | SMD/SMT |
| Lead-Free / RoHS | Yes (N suffix) | — |
| Configuration Method | Active serial (AS), passive serial (PS), JTAG, fast passive parallel (FPP) | — |
| DSP Blocks | [DATA_NEEDED: number of DSP blocks] | — |
| Embedded Multipliers (18x18) | [DATA_NEEDED: number of 18x18 multipliers] | — |
| Transceiver Count | [DATA_NEEDED: number of embedded transceivers] | — |
| Series | — | Stratix III |
| Adaptive Logic Modules (ALMs) | — | 19,000 ALM |
| Embedded Memory | — | 5.49 Mbit |
| Number of User I/Os | — | 296 I/O |
| Operating Supply Voltage (Core) | — | 1.1 V |
| Process Node | — | 65 nm |
| Configuration Memory | — | SRAM-based, in-field re-programmable |
| Tindminan RoHS | — | RoHS Compliant |
| Lead-Free | — | Yes |
| Supplier Device Package | — | 484-FCBGA |