EP3SE50F484I3N vs EP3SL50F484I4 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP3SE50F484I3N sa pamamagitan ng Intel at EP3SL50F484I4 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP3SE50F484I3N EP3SL50F484I4
Brand Intel Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND NRND
Family Stratix III E —
Logic Elements 47,500 —
Number of LABs 1,900 —
Total Memory Bits 5,760,000 —
Maximum User I/O 296 296
Number of I/O Banks [DATA_NEEDED: number of I/O banks] —
Core Voltage VCC 0.9 V —
Auxiliary Voltage VCCAUX 1.1 V —
Process Technology 65 nm 65 nm CMOS
Maximum Internal Frequency 500 MHz —
Speed Grade I3 (industrial, bin 3) —
Temperature na Operasyon -40C to +100C (industrial) -40C to +100C (industrial)
Packhaging 484-pin FC-FBGA (flip-chip BGA) 484-ball FC-FBGA (FCBGA, 1.0 mm pitch)
Uri ng Pagpapasok Surface Mount (BGA) Surface Mount (BGA)
Lead-Free / RoHS Yes (N suffix) —
Configuration Method Active serial (AS), passive serial (PS), JTAG, fast passive parallel (FPP) —
DSP Blocks [DATA_NEEDED: number of DSP blocks] —
Embedded Multipliers (18x18) [DATA_NEEDED: number of 18x18 multipliers] —
Transceiver Count [DATA_NEEDED: number of embedded transceivers] —
Device Family — Stratix III L
Logic Elements (LE) — 47,500
Logic Array Blocks (LABs) — 1,900
Embedded Memory Bits — 2,184,192 bits
Internal Frequency — 800 MHz (max, per digchip datasheet summary)
Core Supply Voltage — 1.1 V
Grade Suffix — I4 = Industrial, speed grade 4
Configuration Modes — JTAG, Passive Serial, FPP, PPA
MultiTrack Interconnect — Yes
TriMatrix Embedded Memory — MLAB, M9K, M144K blocks
Level ng MSL — 3 (168 hours)
Tindminan RoHS — Compliant
Lead-Free — Yes

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