EP3SE50F780C4LG vs EP3SL50F780C4LG Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SE50F780C4LG sa pamamagitan ng Intel at EP3SL50F780C4LG sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP3SE50F780C4LG - 47.5K LE Stratix III E FPGA, 488 I/O, FBGA-780 | Intel
EP3SE50F780C4LG ⚠ Huling Pagbili
Pagsanggunian na paghahambing
| Parametro | EP3SE50F780C4LG | EP3SL50F780C4LG |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Aktibo |
| Family | Stratix III E (Enhanced) | Stratix III L |
| Logic Elements | 47,500 LE | 47,500 |
| Adaptive Logic Modules (ALMs) | 19,000 ALM | — |
| Embedded Memory | 5.49 Mbit | — |
| User I/Os | 488 I/O | — |
| Number of Logic Array Blocks (LABs) | [DATA_NEEDED: LAB count] | — |
| DSP Blocks (18x18 multipliers) | [DATA_NEEDED: DSP block count] | — |
| Transceivers | [DATA_NEEDED: transceiver count and rate] | [DATA_NEEDED: transceiver count/speed] |
| Process Technology | 40 nm TSMC low-power CMOS | 65 nm |
| Speed Grade | -4 (fastest commercial) | C4 |
| Operating Temperature (Commercial) | 0 C to +85 C | — |
| Core Voltage (VCCINT) | 0.9 V / 1.0 V / 1.1 V (programmable) | — |
| Supply Voltage na Operasyon | 1.1 V (logic core nominal) | — |
| Packhaging | 780-BBGA, FCBGA (FBGA-780, 1.0 mm pitch) | 780-ball FC-FBGA |
| Uri ng Pagpapasok | Surface Mount (SMT) | Surface Mount (BGA) |
| Lead-Free Status | Pb-free (LG suffix) | — |
| Level ng Sensitivity sa Asid ng Moisture (MSL) | MSL 3 (per JEDEC J-STD-020) | — |
| RoHS Compliance | Compliant | — |
| Embedded Memory Bits | — | 2,184,192 bits (~2.1 Mbit) |
| User I/O Count | — | 488 |
| Core Voltage | — | 0.9 V |
| Temperature na Operasyon | — | Commercial (0C to +85C) [DATA_NEEDED: precise range] |
| Lead-Free / Halogen-Free | — | Yes (LG suffix) |
| DSP Blocks | — | [DATA_NEEDED: DSP block count] |
| PLL Count | — | [DATA_NEEDED: PLL count] |
| Tindminan RoHS | — | Compliant |
| Level ng MSL | — | [DATA_NEEDED: MSL rating] |
| Configuration Method | — | JTAG / Passive Serial / Flash |