EP3SE80F1152I3N vs EP3SE80F1152I4N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SE80F1152I3N sa pamamagitan ng Intel at EP3SE80F1152I4N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP3SE80F1152I3N - Stratix III E FPGA 80K LE, 1152-FCBGA | Intel
EP3SE80F1152I3N ⚠ Huling PagbiliIntel
EP3SE80F1152I4N - 80K LE Stratix III E FPGA, 1152-FCBGA | Intel
EP3SE80F1152I4N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP3SE80F1152I3N | EP3SE80F1152I4N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Huling Pagbili |
| Family | Stratix III E | — |
| Logic Elements | 80,000 | 80,000 |
| Logic Array Blocks (LABs) | 3,200 | — |
| Embedded Memory Bits | 6,843,392 | 6,843,392 bits |
| Maximum User I/O | 744 | — |
| Packhaging | 1152-ball FCBGA (Flip-Chip BGA) | 1152-BBGA, FCBGA (flip-chip) |
| Process Technology | 65 nm | 65 nm CMOS |
| Core Voltage | 1.1 V | 1.1 V |
| Auxiliary Supply Voltages | 1.2 V, 3.3 V | — |
| Maximum Internal Clock Frequency | 500 MHz | — |
| Temperature na Operasyon | -40 °C to +100 °C (Industrial) | — |
| Speed Grade | I3 | I4 |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Configuration Mode | JTAG / Passive Serial / Fast Passive Parallel | — |
| Configuration Encryption | AES-128 bitstream encryption supported | — |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | Compliant |
| Series | — | Stratix III E |
| User I/O Count | — | 744 |
| Maximum Internal Frequency | — | 450 MHz |
| Operating Temperature Grade | — | Industrial (-40C to +100C junction) |
| Uri ng Memory | — | SRAM-based configuration |
| Configuration Method | — | JTAG / Passive Serial / Fast Passive Parallel (IEEE 1149.1 BST) |
| I/O Standards Supported | — | LVDS, LVCMOS, SSTL, HSTL, PCI, PCI-X |
| Level ng MSL | — | 3 (per JEDEC J-STD-020) |