EP3SE80F1152I4 vs EP3SE110F1152I4 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SE80F1152I4 sa pamamagitan ng Intel at EP3SE110F1152I4 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP3SE80F1152I4 - Stratix III E FPGA 80K LE 1152-FCBGA | Intel (Altera)
EP3SE80F1152I4 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP3SE80F1152I4 | EP3SE110F1152I4 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Obsolete |
| Family | Stratix III E | Stratix III E |
| Logic Elements (LE) | 80,000 | 107,500 |
| Logic Array Blocks (LABs) | 3,200 | 4300 |
| Embedded Memory (bits) | 6,843,392 | 8,936,448 |
| User I/Os | 744 | 744 |
| Maximum Operating Frequency | 800 MHz | — |
| Process Technology | 65 nm CMOS | — |
| Core Supply Voltage | 1.1 V | — |
| Packhaging | 1152-ball FineLine BGA (FCBGA) | 1152-ball FCBGA (Flip-Chip BGA) |
| Temperature na Operasyon | -40 °C to +100 °C TJ (industrial, 'I' grade) | -40°C to +100°C (Industrial) |
| Speed Grade | I4 (fastest industrial) | — |
| Configuration | JTAG IEEE Std 1149.1 boundary-scan | — |
| Architecture | ALM-based Adaptive Logic Module | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (BGA) |
| Tindminan RoHS | Compliant | Compliant |
| Lifecycle | Last Time Buy / Legacy (Intel FPGA legacy program) | — |
| DSP Blocks | — | 744 |
| Process Node | — | 40 nm |
| Maximum User I/O Speed | — | [DATA_NEEDED: maximum I/O toggle rate MHz] |
| PLLs | — | 24 |
| Configuration Modes | — | JTAG, Passive Serial (PS), Fast Passive Parallel (FPP), Active Serial (AS) |
| Memory Interface Support | — | DDR3, DDR2, QDRII+, RLDRAM II |
| Transceiver Protocol Support | — | PCIe Gen1/Gen2, Gbit Ethernet, XAUI, Serial RapidIO |
| Lead-Free | — | Yes |
| Level ng MSL | — | [DATA_NEEDED: MSL rating] |