EP3SL150F1152C4N vs EP3SL110F1152C4N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SL150F1152C4N sa pamamagitan ng Intel at EP3SL110F1152C4N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP3SL150F1152C4N | EP3SL110F1152C4N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | NRND |
| Series | Stratix III L | Stratix III L |
| Family | Stratix III | Stratix III |
| Logic Elements (LE) | 142500 | 107500 |
| Adaptive Logic Modules (ALM) | 57000 | — |
| Embedded Memory Bits | 6543360 | 4992000 |
| Maximum User I/O | 744 | 744 |
| DSP Blocks (18x18 multipliers) | 104 | — |
| Phase-Locked Loops (PLL) | 12 | — |
| Process Technology | 65 nm | 65 nm TSMC low-power CMOS |
| Core Supply Voltage (VCC) | 1.1 V | — |
| Speed Grade | C4 (commercial) | — |
| Temperature na Operasyon | 0C to +85C (commercial) | 0C to +85C (Commercial) |
| Packhaging | 1152-BBGA, FCBGA | 1152-BBGA, FCBGA |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Level ng MSL | [DATA_NEEDED: MSL Level] | 3 (168 hours) |
| Tindminan RoHS | Lead-free (Pb-free) per "N" suffix | Compliant |
| Multi-Gigabit Transceivers | [DATA_NEEDED: number of transceivers] | — |
| Maximum Transceiver Data Rate | 1.25 Gbps | — |
| DSP Blocks | — | 432 |
| PLLs | — | 12 |
| Transceivers | — | 12 (3.125 Gbps) |
| I/O Banks | — | 24 |
| Ball Pitch | — | 1.0 mm |
| Lead-Free | — | Yes |