EP3SL340H1152C3 vs EP3SL340H1152I4 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SL340H1152C3 sa pamamagitan ng Intel at EP3SL340H1152I4 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP3SL340H1152C3 | EP3SL340H1152I4 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Aktibo |
| Family | Stratix III L | — |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements (Cells) | 337,500 | — |
| LABs | 13,500 | — |
| Maximum User I/O Pins | 744 | — |
| Total Internal Memory Bits | 18,822,144 | — |
| Core Supply Voltage (VccINT) | 1.1 V | — |
| Core Fabric Frequency | 717 MHz | — |
| Process Technology | 65 nm CMOS | 65 nm CMOS |
| Packhaging | 1152-ball FCBGA (HBGA) | 1152-ball FCBGA / HBGA |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Operating Temperature Grade | Commercial (0C to +85C) | Industrial (I4: -40C to +100C junction) |
| Speed Grade | C3 | — |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | Compliant |
| Configuration Method | JTAG / Passive Parallel / Active Serial / Configuration Flash | — |
| Series | — | Stratix III L |
| Logic Elements (LE) | — | 337,500 |
| Embedded Memory | — | 18,821,440 bits |
| User I/O Pins | — | 744 |
| Logic Array Blocks (LABs) | — | 13,500 |
| Operating Frequency | — | 717 MHz (max fabric speed) |
| Core Voltage | — | 1.1 V |
| I/O Standards Supported | — | LVDS, LVPECL, HSTL, SSTL, LVCMOS, LVTTL |
| Memory Interface Hard IP | — | DDR / DDR2 / DDR3 SDRAM controllers with PHY |
| Lead-Free | — | Yes |