EP3SL340H1152I4 vs EP3SL340H1152C2N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SL340H1152I4 sa pamamagitan ng Intel at EP3SL340H1152C2N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP3SL340H1152C2N - Stratix III L FPGA, 337.5K LE, 1152-BGA | Intel
EP3SL340H1152C2N ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP3SL340H1152I4 | EP3SL340H1152C2N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Huling Pagbili |
| Series | Stratix III L | — |
| Logic Elements (LE) | 337,500 | — |
| Embedded Memory | 18,821,440 bits | — |
| User I/O Pins | 744 | — |
| Logic Array Blocks (LABs) | 13,500 | — |
| Operating Frequency | 717 MHz (max fabric speed) | — |
| Process Technology | 65 nm CMOS | 65 nm CMOS |
| Core Voltage | 1.1 V | 0.9 V |
| Packhaging | 1152-ball FCBGA / HBGA | 1152-Ball FC-HFBGA (flip-chip) |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Operating Temperature Grade | Industrial (I4: -40C to +100C junction) | Commercial |
| I/O Standards Supported | LVDS, LVPECL, HSTL, SSTL, LVCMOS, LVTTL | — |
| Memory Interface Hard IP | DDR / DDR2 / DDR3 SDRAM controllers with PHY | — |
| Tindminan RoHS | Compliant | — |
| Lead-Free | Yes | — |
| Family | — | Stratix III L |
| Logic Elements | — | 337,500 |
| Embedded Memory Bits | — | 18,822,144 |
| DSP Blocks (18x18 multipliers) | — | 744 |
| Auxiliary / I/O Supply | — | 1.1 V |
| Maximum Fabric Frequency | — | 600 MHz |
| Lead-Free / RoHS | — | Lead-free (per distributor listing) |
| Speed Grade | — | C2 (moderate) |
| JTAG Support | — | IEEE Std 1149.1 Boundary-Scan |
| Uri ng Memory | — | TriMatrix (MLAB + M9K + M144K) |