EP3SL50F484C2G vs EP3SL50F484C4 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SL50F484C2G sa pamamagitan ng Intel at EP3SL50F484C4 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP3SL50F484C4 - Stratix III L FPGA, 47.5K LE, 484-FBGA | Altera
EP3SL50F484C4 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP3SL50F484C2G | EP3SL50F484C4 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Huling Pagbili |
| Family | Stratix III L | Stratix III L |
| Logic Elements | 47,500 LE | 47,500 |
| Adaptive Logic Modules (ALMs) | 19,000 ALM | — |
| Embedded Memory | 2,184,192 bits (2.08 Mbit) | — |
| Maximum User I/Os | 296 I/O | — |
| Number of LABs/CLBs | [DATA_NEEDED: LAB count] | — |
| Operating Supply Voltage (Core) | 1.1 V | — |
| Maximum Operating Temperature | +85 C | — |
| Minimum Operating Temperature | 0 C | — |
| Maksimum na Taktiko ng Oras | 600 MHz | — |
| Process Technology | 65 nm CMOS | 65 nm CMOS |
| Packhaging | 484-ball FCBGA (FBGA-484) | 484-Ball FBGA |
| Style ng Pagpapasok | SMD/SMT | — |
| Packaging | Tray | — |
| Tindminan RoHS | Compliant | Compliant |
| Total Transceivers | [DATA_NEEDED: transceiver count] | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | Yes (variable count) |
| Embedded Memory Bits | — | 2,184,192 |
| Logic Array Blocks (LABs) | — | 1,900 |
| User I/Os | — | 296 |
| Ball Pitch | — | 1.0 mm |
| Temperature na Operasyon | — | 0C to 85C (Commercial) |
| Core Voltage | — | 1.1 V |
| Maximum Internal Frequency | — | 717 MHz |
| Hard Memory Controllers | — | Yes |
| Uri ng Pagpapasok | — | Surface Mount |