EP3SL50F484C4LN vs EP3SL50F484C4 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SL50F484C4LN sa pamamagitan ng Intel at EP3SL50F484C4 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EP3SL50F484C4 - Stratix III L FPGA, 47.5K LE, 484-FBGA | Altera
EP3SL50F484C4 ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | EP3SL50F484C4LN | EP3SL50F484C4 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Huling Pagbili |
| Family | Stratix III L | Stratix III L |
| Logic Elements | 47,500 | 47,500 |
| Logic Array Blocks (LABs) | 1,900 | 1,900 |
| Embedded Memory | 2,184,192 bits | — |
| User I/O Pins | 296 | — |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Packhaging | 484-ball FBGA (FCBGA) | 484-Ball FBGA |
| Speed Grade | -4 | — |
| Temperature Grade | Commercial (0C to +85C) | — |
| Process Node | 65 nm | — |
| Transceivers | [DATA_NEEDED: transceiver count and data rate] | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | Yes (variable count) |
| PLLs | [DATA_NEEDED: PLL count] | — |
| Operating Voltage | [DATA_NEEDED: VCCINT and VCCIO] | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | Compliant | Compliant |
| Embedded Memory Bits | — | 2,184,192 |
| User I/Os | — | 296 |
| Ball Pitch | — | 1.0 mm |
| Temperature na Operasyon | — | 0C to 85C (Commercial) |
| Core Voltage | — | 1.1 V |
| Process Technology | — | 65 nm CMOS |
| Maximum Internal Frequency | — | 717 MHz |
| Hard Memory Controllers | — | Yes |