EP3SL50F484I3N vs EP3SL50F484I4 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SL50F484I3N sa pamamagitan ng Intel at EP3SL50F484I4 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP3SL50F484I3N | EP3SL50F484I4 |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | NRND |
| Family | Stratix III L | — |
| Logic Elements | 47,500 | — |
| Logic Array Blocks (LABs) | 1,900 | 1,900 |
| Embedded Memory | 2,184,192 bits (2.1 Mbit) | — |
| Embedded 18x18 Multipliers | 218 | — |
| Maximum User I/O | 296 | 296 |
| Process Technology | 65 nm CMOS | 65 nm CMOS |
| Core Voltage | 0.9 V / 1.1 V | — |
| Maximum Core Frequency | 500 MHz | — |
| Packhaging | 484-ball FBGA (FC-FBGA, 23x23 mm, 1.0 mm pitch) | 484-ball FC-FBGA (FCBGA, 1.0 mm pitch) |
| Temperature ng Junction na Operasyon | -40C to +100C (Industrial) | — |
| Uri ng Pagpapasok | Surface Mount (SMT) | Surface Mount (BGA) |
| Lead-Free / RoHS | Lead Free / Compliant | — |
| Level ng MSL | [DATA_NEEDED: MSL level per JEDEC J-STD-020] | 3 (168 hours) |
| Programming Tool | Quartus II (legacy) | — |
| Device Family | — | Stratix III L |
| Logic Elements (LE) | — | 47,500 |
| Embedded Memory Bits | — | 2,184,192 bits |
| Internal Frequency | — | 800 MHz (max, per digchip datasheet summary) |
| Core Supply Voltage | — | 1.1 V |
| Temperature na Operasyon | — | -40C to +100C (industrial) |
| Grade Suffix | — | I4 = Industrial, speed grade 4 |
| Configuration Modes | — | JTAG, Passive Serial, FPP, PPA |
| MultiTrack Interconnect | — | Yes |
| TriMatrix Embedded Memory | — | MLAB, M9K, M144K blocks |
| Tindminan RoHS | — | Compliant |
| Lead-Free | — | Yes |