EP3SL50F780C2G vs EP3SL50F780C4G Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SL50F780C2G sa pamamagitan ng Intel at EP3SL50F780C4G sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP3SL50F780C2G | EP3SL50F780C4G |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Aktibo |
| Series | Stratix III L | EP3SL50 |
| Logic Elements | 47,500 LE | 47,500 |
| Adaptive Logic Modules (ALMs) | 19,000 ALM | — |
| Embedded Memory | 2.08 Mbit | — |
| Total Memory Bits | 2,184,192 bit | — |
| User I/Os | 488 | — |
| Operating Supply Voltage (Core) | 1.1 V | — |
| Speed Grade | -2 (C2) | 4 |
| Temperature na Operasyon | 0 °C to +85 °C (Commercial) | 0C to +85C (Commercial) |
| Packhaging | 780-ball FCBGA | 780-ball FC-FBGA |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Tindminan RoHS | Pb-Free / RoHS Compliant (-G suffix) | Compliant |
| Transceivers | Reduced / Not Featured (L-tier) | — |
| DSP Blocks | 18×18 multipliers (per family datasheet) | — |
| Configuration | JTAG / Passive Serial / Fast Passive Parallel | — |
| Family | — | Stratix III L |
| Embedded Memory Bits | — | 2,184,192 |
| Maximum User I/Os | — | 488 |
| Process Technology | — | 65 nm |
| Core Voltage (VCC) | — | 1.1 V |
| Configuration Method | — | FPP / FAS / JTAG |
| PLLs | — | 4 |
| Lead-Free | — | Yes |