EP3SL50F780C3N vs EP3SL50F780C4 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SL50F780C3N sa pamamagitan ng Altera at EP3SL50F780C4 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP3SL50F780C3N | EP3SL50F780C4 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | Stratix III L (low-power sub-family) | Stratix III L |
| Series | EP3SL50 | — |
| Device Type | FPGA - Field Programmable Gate Array | — |
| Logic Elements | 47,500 | 47,500 |
| Number of LABs/CLBs | 1900 | — |
| Total RAM Bits | 2,184,192 | — |
| Number of I/Os | 488 | — |
| Bilang ng Outputs | 488 | — |
| Maximum Internal Frequency | 500 MHz | — |
| Process Technology | 65 nm | 65 nm |
| Core Supply Voltage | 1.1 V | — |
| Packhaging | 780-BBGA, FCBGA (Flip-Chip FBGA) | 780-ball FC-FBGA |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0C to +85C (Commercial) | 0C to +85C (Commercial) |
| Tindminan RoHS | Compliant | [DATA_NEEDED: RoHS status] |
| Embedded Memory | — | 2,184,192 bits |
| Logic Array Blocks (LABs) | — | 1,900 |
| User I/Os | — | 488 |
| Core Voltage | — | 1.1 V |
| Speed Grade | — | C4 |
| Configuration Interface | — | JTAG / Serial |
| Design Tool | — | Quartus II |
| Level ng MSL | — | [DATA_NEEDED: MSL level] |