EP3SL50F780C4LN vs EP3SL50F780I4 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP3SL50F780C4LN sa pamamagitan ng Intel at EP3SL50F780I4 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP3SL50F780C4LN EP3SL50F780I4
Brand Intel Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle NRND Huling Pagbili
Series Stratix III L Stratix III L
Family Stratix III L (Low-Power) —
Logic Elements (LE) 47,500 —
Logic Array Blocks (LAB) 1,900 —
Total RAM Bits 2,184,192 —
User I/O Pins 488 —
Packhaging 780-BBGA, FCBGA (29x29 mm) 780-BBGA, FCBGA
Uri ng Pagpapasok Surface Mount Surface Mount
Process Technology 65 nm —
Core Voltage (VCCINT) 0.86 V to 1.15 V —
Temperature na Operasyon 0C to +85C (Commercial) -40C to +100C (Industrial)
Speed Grade C4 I4 (fastest)
Lead-Free / RoHS Yes (LN suffix indicates lead-free, enhanced) —
Level ng MSL [DATA_NEEDED: MSL moisture sensitivity level] —
Transceivers [DATA_NEEDED: number of integrated transceivers for F780 package] —
DSP Blocks [DATA_NEEDED: 18x18 multiplier count for EP3SL50] —
Configuration SRAM-based, configured via Quartus II —
Manufacturer — Intel (formerly Altera)
Process Node — 40 nm TSMC
Logic Elements — 47,500
Embedded Memory Bits — 2,184,192
Embedded Memory Blocks — M20K blocks
DSP 18x18 Multipliers — 244
User I/Os — 488
PLLs — 8
Global Clock Networks — 28
Core Voltage — 0.9 V
Configuration Method — Serial, parallel, or JTAG
Memory Interfaces — DDR3, QDRII+, RLDRAM II
Hard IP — PCIe Gen2 hard IP blocks
Tindminan RoHS — Compliant

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