EP3SL50F780I4 vs EP3SL50F780I4N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP3SL50F780I4 sa pamamagitan ng Intel at EP3SL50F780I4N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP3SL50F780I4 - 50K LE Stratix III L FPGA, 780-BGA, Industrial | Intel
EP3SL50F780I4 ⚠ Huling Pagbili
Pagsanggunian na paghahambing
| Parametro | EP3SL50F780I4 | EP3SL50F780I4N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Huling Pagbili | Aktibo |
| Series | Stratix III L | — |
| Manufacturer | Intel (formerly Altera) | — |
| Process Node | 40 nm TSMC | — |
| Logic Elements | 47,500 | 47,500 |
| Embedded Memory Bits | 2,184,192 | — |
| Embedded Memory Blocks | M20K blocks | — |
| DSP 18x18 Multipliers | 244 | — |
| User I/Os | 488 | — |
| PLLs | 8 | — |
| Global Clock Networks | 28 | — |
| Core Voltage | 0.9 V | 0.9 V |
| Temperature na Operasyon | -40C to +100C (Industrial) | -40C to +100C (Industrial) |
| Packhaging | 780-BBGA, FCBGA | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Speed Grade | I4 (fastest) | — |
| Configuration Method | Serial, parallel, or JTAG | — |
| Memory Interfaces | DDR3, QDRII+, RLDRAM II | — |
| Hard IP | PCIe Gen2 hard IP blocks | — |
| Tindminan RoHS | Compliant | Compliant |
| Family | — | Stratix III L |
| Total RAM Bits | — | 2,184,192 |
| User I/O Count | — | 488 |
| Number of LABs/CLBs | — | [DATA_NEEDED: LAB count] |
| Number of Transceivers | — | [DATA_NEEDED: transceiver count] |
| Process Technology | — | 65 nm TSMC |
| Auxiliary / I/O Voltage | — | 1.2 V / 3.3 V |
| Package Type | — | 780-ball FC-FBGA (Flip-Chip) |
| Level ng Sensitivity sa Asid ng Moisture (MSL) | — | 3 (168 hours) |
| Configuration Mode | — | SRAM-based, Active Serial / JTAG |
| Bilang ng Pins | — | 780 |
| Lead-Free / Pb-Free | — | Yes |