EP4CE115F23I7N vs EP4CE1152F23C7N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP4CE115F23I7N sa pamamagitan ng Intel at EP4CE1152F23C7N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP4CE115F23I7N | EP4CE1152F23C7N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Series | Cyclone IV E | — |
| Family | EP4CE115 (F23 package) | Cyclone IV E |
| Logic Elements (LE) | 114,480 | 114,480 |
| Embedded Memory Bits | 3,981,312 bits | — |
| Maximum User I/Os | 280 | — |
| Logic Array Blocks (LABs) | 7,180 | — |
| Number of PLLs | 4 | — |
| 18x18 Hardware Multipliers | 266 | — |
| Core Voltage | 1.0 V / 1.2 V | 1.0 V (typical) |
| I/O Voltage Banks | 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Temperature na Operasyon | -40C to +100C (Industrial) | 0C to +85C (commercial) |
| Packhaging | 484-FBGA (F23) 23x23 mm, 1.0 mm pitch | FBGA-484 (FineLine BGA, 23x23 mm) |
| Uri ng Pagpapasok | Surface Mount | — |
| Process Technology | 60 nm low-power CMOS (TSMC) | 60 nm low-power CMOS |
| Configuration Method | JTAG, Active Serial, Active Parallel | — |
| Level ng MSL | 3 | — |
| Tindminan RoHS | Compliant | Compliant |
| Lead-Free | Yes | — |
| Embedded Memory | — | 3.9 Mbits (M9K blocks) |
| Embedded Multipliers (18x18) | — | 266 |
| User I/Os | — | 432 |
| PLLs | — | 4 |
| Global Clock Networks | — | 20 |
| Speed Grade | — | C7 |
| PCIe Hard IP Block | — | Yes, Gen1 x1 |
| External Memory Support | — | DDR/DDR2 SDRAM, QDRII SRAM |