EP4CE55F29C6 vs EP4CE55F29C7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP4CE55F29C6 sa pamamagitan ng Intel at EP4CE55F29C7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP4CE55F29C6 | EP4CE55F29C7 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Family | Cyclone IV E | Cyclone IV E |
| Series | Cyclone IV E | — |
| Logic Elements (LE) | 55,856 | — |
| Logic Array Blocks (LAB) | 47 | — |
| Embedded Memory | 2,396,160 bits (234 Kb) | — |
| Memory Blocks (M9K) | 156 | — |
| Embedded 18x18 Multipliers | 156 | — |
| User I/O Pins | 374 | — |
| PLLs | 4 | — |
| Global Clock Networks | 20 | — |
| Core Voltage | 1.2 V | — |
| Process Technology | 60 nm (low-power) | 60 nm |
| Temperature na Operasyon | Commercial (0C to +85C) | 0C to +85C (Commercial) |
| Packhaging | 780-ball FBGA (29 mm x 29 mm) | 780-ball FBGA (29 x 29 mm, 1 mm pitch) |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount |
| Configuration Modes | AS, AP, PS, JTAG | — |
| Bitstream Encryption | AES-128 (optional) | — |
| Tindminan RoHS | Compliant | Compliant |
| Logic Elements | — | 55,856 |
| Configurable Logic Blocks (CLBs) | — | 3,491 |
| Embedded Memory Bits | — | 2,396,160 |
| Embedded Multipliers (18x18) | — | 156 |
| Phase-Locked Loops (PLLs) | — | 4 |
| Maximum User I/O | — | 374 |
| Maximum Operating Frequency | — | 472.5 MHz |
| Core Voltage (VCCINT) | — | 1.2 V |
| I/O Voltage (VCCIO) | — | 1.2 V to 3.3 V |