EP4CE75F29I7 vs EP4CE55F29I7 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP4CE75F29I7 sa pamamagitan ng Intel at EP4CE55F29I7 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP4CE75F29I7 | EP4CE55F29I7 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Series | Cyclone IV E | Cyclone IV E |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements (LEs) | 75,408 | — |
| Embedded Memory (bits) | 2,810,880 | — |
| Embedded Memory Blocks | 274 (M9K) | — |
| Embedded 18×18 Multipliers | 200 | — |
| PLLs | 4 | — |
| User I/O Count | 426 | 374 |
| Packhaging | 780-ball FBGA (FineLine BGA) | 780-BGA (FBGA, F29) |
| Temperature na Operasyon | -40 °C to +100 °C (Industrial) | -40C to +100C (Industrial, I7) |
| Process Node | 60 nm low-power CMOS | — |
| Core Voltage (VCCINT) | 1.0 V / 1.2 V selectable | — |
| Configuration Modes | JTAG, Active Serial (AS), Passive Serial (PS) | AS, PS, JTAG |
| I/O Standards Supported | LVDS, LVTTL, LVCMOS, SSTL, HSTL | — |
| External Memory Interfaces | DDR/DDR2 SDRAM, QDRII SRAM | — |
| Tindminan RoHS | Compliant | Compliant |
| Level ng MSL | 3 (168 hours) | 3 (per BGA JEDEC J-STD-020) |
| Uri ng Pagpapasok | Surface Mount (BGA) | Surface Mount (BGA) |
| Family | — | FPGA - Field Programmable Gate Array |
| Logic Elements | — | 55,856 |
| Embedded Memory Bits | — | 2,396,160 (M9K blocks) |
| Number of LABs/CLBs | — | 3,491 |
| 18x18 Hardware Multipliers | — | 156 |
| General-Purpose PLLs | — | 4 |
| Process Technology | — | 60 nm low-power CMOS |
| Core Voltage | — | 1.0 V / 1.2 V (per Cyclone IV handbook) |