EP4SGX110HF35I3G vs EP4SE230F29I4N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP4SGX110HF35I3G sa pamamagitan ng Intel at EP4SE230F29I4N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP4SGX110HF35I3G | EP4SE230F29I4N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Logic Elements | 105,600 | 228,000 |
| Embedded Memory Bits | 9,793,536 (9.4 Mbit) | — |
| Maximum User I/O Pins | 488 | — |
| Multipliers (18x18) | 352 | — |
| Core Supply Voltage (nominal) | 0.9 V | — |
| Packhaging | 1152-ball FC-FBGA (HF35), 35 x 35 mm, 1.0 mm pitch | 780-ball FC-FBGA, 29 x 29 mm, 1.0 mm pitch |
| Family | Stratix IV GX | — |
| Speed/Grade | I3 (Industrial, -3 speed) | — |
| Temperature ng Junction na Operasyon | -40 C to +100 C | — |
| Multi-Gigabit Transceivers | 8 channels (3.125 Gbps to 8.5 Gbps per family datasheet) | — |
| Hard IP Blocks | PCIe Gen1/Gen2, external memory PHY | — |
| Uri ng Pagpapasok | Surface Mount (Flip-Chip BGA) | Surface Mount |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| Tindminan RoHS | Compliant | Compliant |
| Lead-Free / Halogen-Free | Lead-free | — |
| Process Technology | 40 nm low-power CMOS | 40 nm CMOS |
| Configuration Memory | SRAM-based (volatile, requires configuration device) | — |
| Series | — | Stratix IV E |
| Adaptive Logic Modules (ALMs) | — | [DATA_NEEDED: ALM count from datasheet] |
| LABs / CLBs | — | 9120 |
| Embedded Memory (bits) | — | 17,544,192 |
| Maximum User I/Os | — | 488 |
| Core Voltage | — | 0.9 V |
| Supply Voltage (I/O banks) | — | 1.0/1.2/1.5/1.8/2.5/3.0 V |
| Temperature na Operasyon | — | -40C to +100C (Industrial I4) |
| Maximum Internal Clock Frequency | — | 717 MHz |
| Maximum Logic Performance | — | [DATA_NEEDED: Fmax in MHz] |
| Number of DLL/PLL | — | [DATA_NEEDED: from Stratix IV Handbook] |
| Transceiver Data Rate | — | Up to 8.5 Gbps (per family spec) |
| Lead-Free | — | Yes |