EP4SGX360KF43C2 vs EP4SGX360KF43C2N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP4SGX360KF43C2 sa pamamagitan ng Intel at EP4SGX360KF43C2N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Intel
EP4SGX360KF43C2 - 353K LE Stratix IV GX FPGA 880 I/O FCBGA | Intel
EP4SGX360KF43C2 ✓ NakahandaPagsanggunian na paghahambing
| Parametro | EP4SGX360KF43C2 | EP4SGX360KF43C2N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Aktibo |
| Series | Stratix IV GX | Stratix IV |
| Logic Elements | 353,600 | — |
| Number of LABs / CLBs | 14,144 | — |
| Total RAM Bits | 23,105,536 (approximately 28.5 Mbit user-accessible) | — |
| Logic Cells (alternative count) | 141,440 | — |
| User I/O Count | 880 | 880 |
| Core Voltage | 0.9 V | — |
| Process Technology | 40 nm | — |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Transceivers | Yes (Stratix IV GX integrated high-speed transceivers) | — |
| Packhaging | 1760-BBGA, FCBGA (Fine-Pitch Chip-Scale BGA) | 1760-ball FC-FBGA (KF43) |
| Package Code | FC-FBGA-1760 | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount (Flip-Chip BGA) |
| Operating Temperature Grade | Commercial (C2 suffix: 0C to +85C) | — |
| Tindminan RoHS | Compliant | Compliant |
| Configuration Interface | JTAG, Passive Serial, Fast Passive Parallel, Active Serial | — |
| Design Software | Quartus II (legacy Stratix IV support) | — |
| Transceiver Data Rate | [DATA_NEEDED: per-channel data rate] | — |
| Family | — | Stratix IV GX |
| Logic Elements (LE) | — | 353,600 |
| Adaptive Logic Modules (ALMs) | — | 14,144 |
| Logic Cells | — | 353,600 |
| Embedded Memory (bits) | — | 23,105,536 |
| Core Voltage (Vcc) | — | 0.9 V |
| Process Node | — | 40 nm |
| Speed Grade | — | C2 |
| Temperature Grade | — | Industrial |
| Level ng MSL | — | 3 (per JEDEC J-STD-020, 168 hours) |