EP610DI-25 vs EP610DI-35 Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EP610DI-25 sa pamamagitan ng Intel at EP610DI-35 sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EP610DI-25 EP610DI-35
Brand Intel Intel
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Part Family Classic EPLD —
Macrocells 16 —
Propagation Delay (tPD) 25 ns —
Maximum Pipelined Clock Frequency 100 MHz (max fCNT, per family datasheet) —
I/O Pins 16 (bidirectional) 16 bidirectional
Dedicated Inputs 4 —
Total User I/O 20 —
Technology CMOS EPROM (UV-erasable) CMOS, UV-erasable
Supply Voltage (VCC) 5 V nominal —
Package Type Ceramic DIP, glass-sealed (windowed), R-GDIP-T24 —
Bilang ng Pin 24 —
Uri ng Pagpapasok Through-Hole (DIP) Through-hole
Temperature na Operasyon Industrial (per "I" suffix) [DATA_NEEDED: industrial/commercial grade range]
Speed Grade Suffix 25 = 25 ns —
Compliance RoHS status unknown (legacy 1990s part) —
Family — Altera Classic EPLD
Series — EP610
Logic Cells / Macrocells — 16 macrocells
Usable Gates — 300
Product Terms — 160
Total Inputs — 20 (including 4 dedicated inputs)
Propagation Delay (tpd) — 35 ns
Maximum Toggle Frequency — 28.6 MHz
Internal Pipelined Data Rate — Up to 100 MHz
Volte ng Pagbibigay — 5 V
Packhaging — 24-pin CDIP (Ceramic DIP)
Tindminan RoHS — [DATA_NEEDED: not confirmed in supplied web data]

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